Complementary metal-oxide-semiconductor (“CMOS”) image sensors (“CIS”) may generate inaccurate image data due to dark current in the pixels themselves and variation in the level of dark current from pixel to pixel. Each pixel of a CIS array provides an output voltage that varies as a function of the light incident on the pixel. Unfortunately, dark currents add to the output voltages and degrade the picture provided by the imaging system. To generate accurate image data, it is desirable to estimate dark current and level correct for it.
Modern CMOS imagers often include some sort of feedback loop to automatically set the black level in the output. The analog voltage associated with “true” black may be obtained by reading “black reference pixels.” Black reference pixels are typically arrayed immediately next to the active image array. In front side illuminated (“FSI”) image sensors, one of the metal layers within the front side metal stack shields the black reference pixels in order to block any incoming light. Circuitry within the FSI image sensor then offsets the voltage output for the active pixels with reference to the output value from these black reference pixels. The black reference pixels are used to generate a low count value or a user specified set point value that will typically be displayed as black. Cameras are traditionally set to a black level set point that is slightly greater than the read noise. Camera gain is then set to achieve a suitable image. Setting the proper black level is particularly important when working at very low signal levels or low ambient light environments. If the black level is set too low, dim objects will be clipped and not displayed. If the black level is set too high, image contrast will suffer.
FIG. 1A illustrates a conventional active pixel 100 of a FSI image sensor array, while FIG. 1B illustrates a conventional black reference pixel 105 of a FSI image sensor array. The frontside of pixels 100 or 105 is the side of substrate 110 upon which the pixel circuitry is disposed and over which metal stack 115 for redistributing signals is formed. In active pixel 100, the metal layers (e.g., metal layer M1 and M2) are patterned in such a manner as to create an optical passage through which light incident on the frontside of active pixel 100 can reach the photosensitive photodiode (“PD”) region 120. In contrast, the optical passage of black reference pixel 105 is intentionally blocked and covered over with a metal layer M3.
CMOS FSI imagers utilize dark pixels, ones with light blocking layers, to estimate the dark current for a pixel array and combine the estimate with the exposed pixel data to generate accurate image data. For backside illuminated (“BSI”) CIS it is more difficult and expensive to fabricate light blocking pixels. In addition to added expense, forming a metal pattern on the backside of such an imager can cause etch damage and result in defects. Additionally, insulating films associated with metal light blocking layers may create stress differences between the dark pixels and the imaging pixels that result in the two types of pixels displaying different dark current characteristics. In that case the black level calibration may not faithfully represent the black level of the imaging array.